Pulse generator for use with a switching regulator

ABSTRACT

A rate generator and a recovery disable circuit receive an input current and deliver pulses having a frequency which is proportional to the value of the current received. The recovery disable circuit prevents the rate generator from delivering pulses during the time the silicon controlled rectifiers and output diodes of the switching regulator are conducting. The rate generator includes an oscillator which develops pulses and a pulse amplifier which amplifies the pulses and prevent noise signals from decreasing the width of the pulses.

[451 Oct. 10, 1972 United States Patent Nowell et a1.

22 ll 22 233 3 mm m w m. elm M SMG 900 677 999 111 //l 4 9 PrimaryExaminer-William H. Beha, Jr. Attorney-Lloyd B. Guernsey et a1.

Waltham, Mass.

[57] ABSTRACT A rate generator and a recovery disable circuit receive[22] Filed: Dec. 22, 1971 [21] Appl. No.: 214,500

an input current and deliver pulses having a frequency [52] Us Cl Iwhich is proportional to the value of the current received. The recoverydisable circuit prevents the 321/12, 321/18 .H02m l/08, H02m 1/18, H02m3/32 rate generator from delivering pulses during the time the siliconcontrolled rectifiers and output diodes of [51] Int. Cl...... [58]FieldofSearch........32l/2,11,12,13,18, 45 R;

the switching regulator are conducting. The rate generator includes anoscillator which develops pulses and a pulse amplifier which amplifiesthe pulses and prevent noise signals from decreasing the width of thepulses.

[56] References Cited UNITED STATES PATENTS 3,119,058 H1964Genuit...................307/252 K 9 Claims, 4 Drawing Figures m mm Z Zlllllll PULSE GENERATOR FOR USE WITH A SWITCHING REGULATOR CROSSREFERENCE TO RELATED APPLICATIONS A detailed description of theoperation of the error amplifier can be found in the U.S. patentapplication by John R. Nowell filed November 22, 1971, entitled ErrorAmplifier forUse with a Switching Regulator. A more detailed descriptionof the operation of the switching regulator can be found in the U.S.Pat. No. 3,573,597 by Luther L. Genuit and John R. Nowell, issued April6, l97l, entitled High Current Switching Regulator with OverlappingOutput Current Pulses.

BACKGROUND OF THE INVENTION This invention relates to a pulse generatorfor use with a switching regulator and more particularlyto a pulsegenerator which uses a rate generator, a recovery disable circuit and apulse amplifier to receive an input current and to deliver pulses havinga frequency which is proportioned to the value of the current received.The recovery disable circuit prevents the rate generator from deliveringpulses. during the time that the silicon controlled rectifiers and theoutput diodes of the switching regulator are conducting. The pulseamplifier increases the amplitude of the pulses and also prevents noisesignals from decreasing the width of the pulses generated.

In high speed data processing systems switching regulators may be usedto provide D.C. power to electronic circuits in the system. Theseregulators are smaller and more efficient than prior art power suppliesso that the regulators may be located in the cabinets which contain thecircuits rather than in a separate cabinet'as required when prior artpower supplies are used. Location of regulators near the circuitsgreatly reduces the length of cables which distribute the current to thecircuits and reduces the amount of error signals which may be caused byvariation in voltage in long cables.

The switching regulator may employ a pair of transformers, 'a pair ofsilicon controlled rectifiers and a source of signals to convert anunregulated D.C. voltage, such as 150 volts, to an accurately regulatedvoltage, such as one volt. The silicon controlled rectifiers areemployed as switches between the source of unregulated D.C. voltage andthe transformers. The silicon controlled rectifiers are located on thehigh voltage side of the transformers where the current and power lossesin these rectifiers are low, thereby causing the switching regulator tohave a high degree of efficiency. The regulated D.C. voltage obtainedfrom the secondary windings on the transformers is supplied to a pair ofvoltage output terminals. The transformers provide isolation between theregulated D.C. voltage and the source of unregulated D.C. voltage sothat a short circuit in a silicon controlled rectifier will not causedamage to the microcircuit modules which provide the load on theswitching regulator.

The silicon controlled rectifier is a semi-conductor device having ananode, a cathode and a gate. The silicon controlled rectifier can beused as an ON-OFF switch which can be turned on in a very fewmicroseconds. Normally, the silicon controlled rectifier cannot conductcurrent between anode and cathode thereof until a pulse of currentlarger than a threshold value flows from gate to cathode. If a positivevoltage difference exists between the anode and the cathode when a pulseof current flows into the gate, the silicon controlled rectifier fires;i.e., is rendered conductive and a current will flow from the anode tothe cathode. The rate at which the current flow from anode to cathodeincreases when the silicon controlled rectifier fires must be limited toprevent damage to the rectifier. Once anode-cathode flow commences, thegate has no further control over such current flow. Current flow fromanode to cathode in a rectifier can be terminated only by reducing theanode to cathode current below a holding or minimum current value. Amore detailed description of the operation of a silicon controlledrectifier can be found in the Silicon Controlled Rectifier Manual, 4thedition, 1967, published by the General Electric Company, Syracuse NewYork.

A signal source is coupled to the voltage output terminals and developstrigger signals whose frequency is determined by the value of voltage atthe voltage output terminal. The trigger signals are coupled to thesilicon controlled rectifi'ers in the switching regulator and causethese rectifiers to deliver energy through the transformers to outputfilter capacitors which are connected to the voltage output terminal.The signal source senses any change in the value of regulated outputvoltage and causes a change in the frequency of the trigger signalsdelivered to the switching regulator.

The signal source includes an error amplifier, a rate generator and atrigger generator. The error amplifier develops a current having a valuewhich is determined by the voltage at the output terminals of theswitching regulator. This current is applied to the rate generator whichdevelops pulses having a frequency which is determined by the value ofthe current from the error amplifier. The pulses from the rate generatorare applied to the trigger generator which develops trigger signalswhich are applied to the gates of the silicon controlled rectifiers inthe switching regulator.

Prior art rate generators include an oscillator and a circuit whichdisables the oscillator during the time that all of the secondarywinding of the transformers in the switching regulator are deliveringcurrent to the output filter capacitors. If the oscillator were todeliver a pulse to the switching regulator while all of the secondarywindings are delivering current to the filter capacitor current in oneof the silicon controlled rectifiers could increase very rapidly andcause damage to the rectifier. Prior art rate generators use aunijunction transistor and a capacitor-resistor charging circuit. Thecapacitor charges through a resistor to a predetermined value ofvoltage, then discharges through the unijunction transistor to provide apulse. If the capacitor charges while one of the silicon controlledrectifiers is conducting the oscillator could develop a pulse whichcould render the other rectifier conductive at the same time. If bothrectifiers are conductive at the same time current through therectifiers could become large enough to cause damage to the rectifiers.What is needed is a circuit which prevents the capacitor from chargingwhile one of the rectifiers is conducting and thus inhibits thegeneration of pulses while the rectifier is conducting.

The present invention provides a pulse generator having a rate generatorand a recovery disable circuit. The recovery disable circuit preventsthe generation of pulses while any of the silicon controlled rectifiersin the switching regulator are conducting. The circuit also preventsdeveloping a pulse for a rectifier while the transformer which isconnected to the rectifier is delivering current to the filtercapacitors.

It is, therefore, an object of this invention to provide a pulsegenerator having a circuit which inhibits the generation of pulses whileall of the secondary windings of the switching regulator are deliveringcurrent to the output filter capacitors.

A further object of this invention is to provide a pulse generatorhaving a circuit which inhibits the generation of pulses while any ofthe silicon controlled rectifiers in the regulator are conducting.

A still further object of this invention is to provide a pulse generatorhaving a circuit which inhibits the generation of pulses while all ofthe secondary windings of the switching regulator are delivering currentto the output filter capacitors, but is ready to produce a pulse as soonas one of the transformer windings stops the delivery of current.

Still another object of this invention is to provide a generator whichdevelops pulses having a frequency which is determined by the value of asignal current which is applied to the generator.

SUMMARY OF THE INVENTION The foregoing objects are achieved in thepresent invention by providing a new and improved pulse generator foruse with a switching regulator. The pulse generator includes a rategenerator and a recovery disable circuit. The rate generator includes anoscillator using a unijunction transistor and a pulse amplifier. Theunijunction oscillator receives an input current and delivers pulseshaving a frequency which is proportional to the value of the currentreceived. The

recovery disable circuit prevents the oscillator from developing pulseswhile any one of the silicon controlled rectifiers in the switchingregulator is conducting. The disable circuit also prevents theoscillator from developing a pulse for a rectifier while the transformerwhich is connected to the rectifier is delivering current to the filtercapacitors in the switching regulator.

Other objects and advantages of this invention will become apparent fromthe following description when taken in connection with the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic drawing of aswitching regulator and its associated control circuits including thepresent invention;

FIG. 2 is a schematic drawing of an embodiment of the present invention;

FIG. 3 illustrates a magnetization curve which is useful in explainingthe operation of the circuits shown in FIG. I; and

FIG. 4 illustrates waveforms which are useful in explaining the presentinvention.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring more particularly tothe drawings by the characters of reference, FIG. 1 discloses a powersupply system which is designed to provide a constant supply of D.C.output voltage for a wide range of values of output current and formonitoring the current delivered to a load which may be connected to thesystem. As indicated in FIG. 1, the system comprises a switchingregulator 10, a switching regulator control circuit 11 for providingtrigger signals to switching regulator 10, and a circuit 12 formonitoring the current and the voltage delivered by the power supply.The switching regulator control circuit 11 comprises a trigger generator14, a rate generator 15, a recovery disable circuit 16 and an erroramplifier 17. The error amplifier l7 detects any change in voltage atthe output terminals of the switching regulator and provides a signalwhose value is determined by the change in the output voltage. Thesignal from the error amplifier 17 causes the rate generator 15 todevelop pulses having a frequency which is determined by the value ofthe signal from the amplifier l7. Pulses from the rate generator causethe trigger generator 14 to develop trigger pulses for the switchingregulator. The recovery disable circuit 15 senses the time that outputcurrent is being delivered by the switching regulator to the outputfilter capacitors and prevents the rate generator from delivering pulsesduring the time that the current is being delivered.

The over-current detector 20, the over-voltage detector 21 and theunder-voltage detector 22 sense any abnormal values of current orvoltage at the output of the switching regulator and provide signals tothe fault shutdown circuit 19. When the fault shutdown circuit 19receives a signal from any of the detectors 20, 21 and 22 it provides asignal to the rate generator which disables the rate generator andprevents any pulses from being supplied to trigger the switchingregulator.

SWITCHING REGULATOR As indicated in FIG. 1, switching regulator 11includes a pair of transformers 25 and 26, each having a primary windingand a secondary winding. The primary windings 28 and 30 are connected inseries and are coupled to the high voltage unregulated D.C. power supplyhaving a positive output terminal 36 and a negative output terminal 37.A pair of silicon controlled rectifiers 33 and 34 control the currentsupplied by the power supply to the primary windings of transformers 25and 26. The anode of silicon controlled rectifier 33 is connected to thepositive terminal 36 of the unregulated D.C. power supply and thecathode of silicon controlled rectifier 33 is connected to the upper endof primary winding 28. The gate of silicon controlled rectifier 33 isconnected to one lead of the trigger generator 14 which provides triggersignals to render rectifier 33 conductive. The anode of siliconcontrolled rectifier 34 is connected to the lower end of primary winding30 and the cathode of silicon controlled rectifier 34 is connected tothe negative terminal of the unregulated D.C. power supply. A secondlead from the trigger generator 14 is connected to the gate of siliconcontrolled rectifier 34 to provide trigger signals to render rectifier34 conductive.

The magnetic core employed in transformers and 26 produces themagnetization characteristics illustrated in the magnetization curve ofFIG. 3. The magnetizing force H is equal to the product of the number ofturns in a winding on the transformer core and the number of amperes ofcurrent for each turn of wire divided by the length of the core. Sincethe physical length of the particular transformer core is constant themagnetizing force of the transformer is often expressed as the number ofamperes times the number of turns, or ampere turns. The flux density Bis the number of lines of flux per square centimeter of the transformercore and is determined by the value of the. magnetizing force and thetype of material used in the core. A discussion of the magnetizationcurves can be found in the text book Magnetic Circuits and Transformersby EB. Staff, M.I.T., 1943, published by John Wiley & Sons, New York,New York. I

The operation of the circuit of FIG. 1 will now be discussed inconnection with the magnetization curve shown in FIG. 3 and thewaveforms shown in FIG. 4.

A pair of capacitors 40 and 41 provide predetermined quantities ofelectrical energy to the transformers 25 and 26 each time one of thesilicon controlled rectifiers 33 and 34 is rendered conductive. Eachtime one of the silicon controlled rectifiers 33 and 34 is renderednon-conductive the same predetermined quantity of energy is delivered byone of the transformers 25 and 26 through diodes 43 and 44 to a filtercapacitor 48. Prior to the time t shown in FIG. 4, capacitor 40 of FIG.1 is charged to the polarity shown in FIG. 1. At time t, a pulse fromtrigger generator 14 renders silicon controlled rectifier 33 conductiveso that the voltage across the capacitor 40 is supplied to the primarywinding 28 of transformer 25 causing a current I to flow from the upperplate of capacitor 40 through to anode to cathode of rectifier 33,through the primary winding 28 to the lower plate of capacitor 40. Thecurrent I through primary winding 28 causes a change of flux in thetransformer core and causes the operating point to move from point Atoward point C of the magnetization curve in FIG. 3. This change in fluxproduces a voltage across primary winding 28, which limits the rate ofincrease in current through silicon controlled rectifier 33, thuspreventing possible damage to rectifier 33. A positive voltage appliedto the upper end of primary winding 28 causes the operating point tomove upward from point C toward point D. The distance between point Cand point D is proportional to the product of the voltage applied toprimary winding 28 and the duration of time this voltage is aplied.

p The voltage applied to the primary winding 28 is magnetically coupledthrough the transformer core to the secondary winding 29. Between timet, and time t secondary winding 29 has a positive polarity of voltage atthe lower end of the winding and a negative polarity of voltage at theupper end of the winding. At this time, the voltage across the secondarywinding 29 causes diode 43 to be back biased so that no current flowsthrough the diode or through the secondary winding 28. Capacitor 40provides current I until this capacitor has discharged at time as shownin waveform l of FIG. 4. The area M under the curve of waveform E (FIG.4) between time 2 and I is the sum of the products of and the energywhich is transferred to the secondary winding 29 when silicon controlledrectifier 33 is rendered nonconductive, is proportional to thedifference between the flux at point E and point G.

Since the distance between point A through point C to point D shown inFIG. 3 is substantially the same as the distance between point E throughpoint F to point G, substantially all of the energy which was stored inthe core of the transformer between times t, and t, is returned and isstored in capacitors 48 and 49. Capacitor 40 delivers substantially thesame amount of energy to the transformer each time the siliconcontrolled rectifier 33 is rendered conductive so that the amount ofenergy delivered to filter capacitors 48 and 49 and the voltage acrossthese capacitors is determined by the frequency of the signals appliedto the gate of rectifier 33. Capacitor 41 also provides a predeterminedquantity of energy to the transformer 26 each time silicon controlledrectifier 34 is rendered conductive.

Prior to time capacitor 41 is charged to the polarity shown in FIG. 1.At time t, a pulse from the trigger generator 14 renders siliconcontrolled rectifier 34 conductive so that current I, flows from theupper plate of capacitor 41 through the primary winding 30, from anodeto cathode of rectifier 34 to the lower plate of capacitor 41. Current Ithrough the primary winding and the voltages impressed across thiswinding cause the operating point of the characteristic curve in FIG. 3to move from point A through point C to point D and causing apredetermined quantity of energy to be stored in the core of transformer26. When silicon controlled rectifier 34 is rendered nonconductive, thisenergy is transferred through the secondary winding 31 causing a.current 1,, to charge capacitor 48 as described above.

The amount of voltage across the capacitors 48 and 49 can be controlledby controlling the frequency of the trigger signals which triggergenerator 14 applies to the gates of silicon controlled rectifiers 33and 34. The frequency of the trigger signals is determined by the valueof the current applied to the rate generator 15. When an increase in theamount of current drawn by a load (not shown) connected across theoutput terminals 51 and 52 in FIG. 1 causes the value of the outputvoltage to fall below a predetermined reference level, the frequency ofthe signals from trigger generator 14 increases. This increase in thefrequency of the output signals causes an increase in the rate of energydelivered to filter capacitors 48 and 49 and increases the voltage atthe output terminals 51 and 52 to the predetermined reference level. Thevoltage at the output terminal 51 of the power supply controls thefrequency of the signal from the trigger generator 14 so that thevoltage at the output terminals 51 and 52 is substantially constant evenwhen the current drawn from this power supply varies over a wide rangeof value.

Pulse Generator As indicated in FIG. 2, the pulse generator comprises arecovery disable circuit 54 and a rate generator which includes anoscillator 55 and a pulse amplifier 56. The oscillator 55 generates aseries of pulses having a frequency which is determined by the value ofcurrent supplied from the error amplifier to the signal-input terminal58. These pulses are amplified by the pulse amplifier 56 and applied tothe signal-output terminal 106 which is coupled to the trigger generatorshown in FIG. 1. The oscillator 55 includes a unijunction transistor 83,a transistor 88 and a timing capacitor 91. A unijunction transistor is asemiconductor device having a first base or base-one, a second base orbasetwo and an emitter. If a positive voltage difference exists betweenbase-two and base-one, the unijunction transistor can conduct currentbetween the emitter and base-one only when a voltage greater than thepredetermined threshold or peak point voltage value exists between theemitter and base-one. When the voltage on the emitter is more than thepeak point voltage, current flows from emitter to base-one until theemitter voltage decreases below a second predetermined or valley voltagevalue. A more detailed description of a unijunction transistor can befound'in chapter l3 of the Transistor Manual, 7th edition, 1964,published by the General Electric Company, Syracuse, New York.

' A positive voltage such as the +15 volts is applied to terminal 81 andcoupled through resistor 82 to basetwo of the unijunction transistor.Base-one is connected to the collector of transistor 88. A current fromthe error amplifier is applied to signal-input terminal 58. The currentfrom the error amplifier causes a current I, to flow from terminal 58through diode 90 to the upper plate of capacitor 91, from the lowerplate of capacitor 91 through resistor 92, from the base to emitter oftransistor 104 in the pulse amplifier. Current I produces a charge ofthe polarity shown on capacitor 91. Transistor 88 provides a dischargepath for the capacitor 91 when transistor 88 is conductive and preventsdischarge of the capacitor when the transistor is non-conductive. When apositive voltage is applied to the base of transistor 88, transistor 88is rendered conductive.

When unijunction transistor 83 is not conducting the voltage at the baseof transistor 104 in pulse amplifier 56 is positive due to the +15 voltson terminal 98. The positive voltage on terminal 98 causes a current Ito flow from terminal 98 through resistor 101, from base to emitter oftransistor 104 thereby rendering transistor 104 conductive. Whentransistor 104 is conductive a current I flows from terminal 99 throughresistor 102, from collector to emitter of transistor 104. Current Ithrough resistor 102 provides a voltage drop of the polarity shown inFIG. 2. The voltage drop across resistor I02 subtracts from the volts atterminal 99 so that the voltage at signal-output terminal 106 is nearground potential.

Current I causes the voltage across capacitor 91 to increase until thevoltage at the emitter of unijunction transistor 83 is greater than thepeak point voltage. If transistor 88 is conductive the voltage at theemitter of unijunction transistor 83 causes a current l to fiow from theupper plate of capacitor 91 through emitter to base-one of transistor83, from collector to emitter of transistor 88 to ground, from groundthrough diode 93, and resistor 92 to the lower plate of capacitor 91thereby discharging capacitor 91. Current I through diode 93 develops anegative voltage at the cathode of diode 93 so that a negative voltageis applied to the base of transistor 104 thereby rendering transistor104 nonconductive. When transistor 104 is rendered nonconductive thevoltage drop across resistor 102 decreases so that a positive pulse ofvoltage is developed at the signal-output terminal 106.

When either of the silicon controlled rectifiers shown in FIG. 1 isconducting the recovery disable circuit 54 provides a low impedancebetween the signal-input terminal 58 and ground so that the capacitor 91in the rate generator is unable to charge. When silicon controlledrectifier 33 is conducting a negative voltage is developed across thesecondary winding 29 of transformer 25 as shown in waveform E of FIG. 4.When silicon controlled rectifier 34 is conducting a negative voltage isdeveloped across the secondary winding 31 Y as shown in-waveform EResistors 70 and 71 of FIG. 2

are connected to the secondary windings 31 and 29 respectively of thetransformers shown in FIG. 1.

When silicon controlled rectifier 34 of FIG. 1 is rendered conductivethe negative voltage atthe upper end of winding 31 (FIG. 2) causes acurrent I to flow from the base to emitter of transistor 66, throughresistor 70 and secondary winding 31 to ground. Current I renderstransistor 66 conductive. When transistor 66 is rendered conductive theimpedance between collector and ground is very low so that the collectorof transistor 66 is substantially at ground potential. The groundpotential at the collector of transistor 66 and at the signal-inputterminal 58 prevents current from flowing through diode 90 to chargecapacitor 91 in the rate generator 55. The current applied to inputterminal 58 flows from terminal 58 through collector to emitter oftransistor 66, through resistor and winding 31 to ground. When siliconcontrolled rectifier 33 of FIG. 1 is rendered conductive the voltageacross secondary winding 29 causes transistor 67 (FIG. 2) to beconductive so there is a low impedance between the collector of.transistor 67 and ground. This low impedance also prevents capacitor 91from charging. Thus, when either transistor 66 or 67 in the recoverydisable circuit is rendered conductive capacitor 91 in the rategenerator does not charge.

It is also important that the rate generator not develop pulses totrigger one of the silicon controlled rectifiers when the other siliconcontrolled rectifier is conductive. When both silicon controlledrectifiers 33 and 34 are rendered conductive at the same time there is alow impedance between terminals 36 and 37 of the switching regulatorshown in FIG. 1. This low impedance could cause a high value of currentto flow from terminal 36 through silicon controlled rectifier 33 andwindings 28 and 30, through rectifier 34 to terminal 37. This high valueof current could cause damage to the silicon controlled rectifiers. Therecovery disable circuit 54 prevents both of the silicon controlledrectifiers from being rendered conductive at the same time. This can beseen be referring to waveforms E and E of FIG. 4. For example, at time2., the silicon controlled rectifier 34 is rendered conductive by apulse shown in waveform R. It can be seen in waveform E that thetransformer 25 is still delivering energy to the output filtercapacitors through diode 43 as shown by the positive voltage in waveformE As soon as the silicon controlled rectifier 34 is renderednonconductive the voltage across secondary winding 31 is positive asshown in waveform E of FIG. 4. Thus, between time and both of thewaveforms E and E6 are positive so that the voltages at the lower end ofresistors 70 and 71 in the recovery disable circuit 54 of FIG. 2 arepositive. The positive voltage at the lower end of resistors 70 and 71causes transistors 65 and 68 to both be rendered conductive.

When transistor 65 is rendered conductive a current flows from terminal59 through resistor 62 and transistor 65 to ground. Current 1 produces avoltage drop of the polarity shown across resistor 62 so that thevoltage at the collector of transistor 65 is near ground potential. Whentransistor 68 is rendered conductive a current I flows from terminal 60through resistor 63 to transistor 60 to ground. Current 1,, provides avoltage drop of the polarity shown across resistor 63 so that thevoltage at the collector of transistor 68 is near ground potential. Thelow voltage at the collector of transistor 65 and the low voltage at thecollector of transistor 68 cause a low value of voltage to be coupledthrough diodes 73 and 74 to the base of transistor 88 in the oscillator55. Current causes transistor 104 in the pulse amplifier to beconductive so that current I produces a voltage drop across resistor102. The voltage drop across resistor 102 causes a low value of voltageat the collector of transistor 102. This low value of voltage is coupledthrough diode 95 to the base of transistor 88. The low value of voltagescoupled through diodes 73, 74 and 95 cause transistor 88 to benonconductive. When transistor 88 is nonconductive the capacitor 91cannot discharge and cannot produce any pulses which would cause thetrigger generator to render the silicon controlled rectifiers in FIG. 1conductivc.

While the principles of the invention have now been made clear in anillustrative embodiment, there will be many obvious modifications of thestructure, proportions, materials and components without departing fromthose principles. The appended claims are intended to cover any suchmodifications.

What is claimed is:

l. A pulse generator for use with a switching regulator having a pair ofsilicon controlled rectifiers, a pair of diodes, and first and secondtransformers each having a primary winding and a secondary winding, saidgenerator comprising:

a unijunction transistor having an emitter and first and second bases;

a capacitor, a first plate of said capacitor being connected to saidemitter of said unijunction transistor;

a first resistor;

first and second reference potentials, said second base of saidunijunction transistor being connected to said first potential;

a signal-input terminal;

a first diode, said first diode being connected between said inputterminal and said first plate of said capacitor;

a disabling circuit, said disabling circuit being connected between saidsecond potential and said first base of said unijunction transistor,said first resistor being connected between a second plate of saidcapacitor and said second potential, said disabling circuit beingcoupled to said regulator, said regulator developing a first signal whenboth of said diodes in said regulator are conducting, said first signalcausing said disabling circuit to have an extremely large value ofimpedance between said second potential and said unijunction transistor,said regulator developing a second signal when either of said diodes insaid regulator is not conducting, said second signal causing saiddisabling circuit to have a low value of impedance between said secondpotential and said unijunction transistor;

a recovery disable circuit, said disable circuit being connectedbetweensaid input terminal and said second potential, said disable circuitbeing coupled to said regulator, said regulator providing a signal whichcauses said disable circuit to have a low impedance between said inputterminal and said second potential when either of said rectifiers isconducting, said disable circuit having a large value of impedance whenneither of said rectifiers is conducting.

2. A pulse generator as defined in claim 1 wherein:

said disabling'circuit is coupled to said recovery disable circuit, saidfirst signal from said regulator causing said recovery disable circuitto develop a disabling signal which causes said disabling circuit tohave an extremely large value of impedance between said second potentialand said unijunction transistor, said second signal from said regulatorcausing said recovery disable circuit to develop an enabling signalwhich causes said disabling circuit to have a low value of impedance.

3. A pulse generator as defined in claim 1 wherein said recovery disablecircuit includes:

first, second, third and fourth transistors each having a base, acollector and an emitter;

second, third, fourth and fifth resistors, said second resistor beingconnected between said first potential and said collector of said firsttransistor, said third resistor being connected between said firstpotential and said collector of said second transistor, said emitters ofsaid first and said second transistors being connected to said secondpotential, said bases of said third and said fourth transistors beingconnected to said second potential, said emitter of said thirdtransistor being connected to said base of said first transistor, saidemitter of said fourth transistor being connected to said base of saidsecond transistor, said collectors of said third and said fourthtransistors being connected to said input terminal, said fourth resistorbeing connected between said base of said first transistor and a firstend of said secondary winding of said first transformer, said fifthresistor being connected between said base of said second transistor anda first end of said secondary winding of said second transformer, asecond end of each of said secondary windings of said first and saidsecond transformers being connected to said second potential.

4. A pulse generator as defined in claim 3 wherein said disablingcircuit includes:

a fifth transistor having a base, a collector and an emitter, saidemitter of said fifth transistor being connected to said secondpotential, said collector of said fifth transistor being connected tosaid first base of said unijunction transistor, said base of said fifthtransistor being coupled to said collectors of said first and saidsecond transistors. 5. A pulse generator as defined in claim 1including: a second diode, said second diode being connected potentialand said collector of said first transistor, said second resistor beingconnected between said first potential and said collector of said secondtransistor, said emitters of said first and said between said firstresistor and said second potensecond transistor being connected to saidsecond tial; and potential, said bases of said third and said fourth anamplifier having an input lead and an output lead, transistors beingconnected to said second potensaid input lead of said amplifier beingconnected to tial, said emitter of said third transistor being conthejunction point between said second diode and nected to said base of saidfirst transistor, said said first resistor, said output lead of saidamplifier l0 erlmter of Sald fourth translstof E"" being connected tosaid disabling circuit, current sjald of Sam Second translstor saldfourth through Said Second diode causing Said amplifier sistor beingconnected between said base of said to provide a feedback signal to saiddisabling cirfil'st fflanslstof and a first end of seconfjary cuit whenSaid capacitor is discharging Said feed winding of said firsttransformer, said fifth resistor back signal causing said disablingcircuit to have a 1; Connected between base of Said low value ofimpedance irrespective of any other trans stor and a first end of saidsecondary winding signals which are coupled to said disabling circuit.of i second P P a 9 end of eac h 6. A pulse generator as defined inclaim 3 including: of sald secondary wmdmfis of Sald first and i asecond diode, said second diode being connected Second bemg connectfadSald between said first resistor and said second potensefiond potentlaliF confactors of Sald thud 'l tial; and said fourth transistors beingconnected to said an amplifier having an input lead and an output lead,input terminal, said collector of said fifth transistor said input leadof said amplifier being connected to b emg F l first base, of Sam l thejunction point between Said Second diode and non transistor, saidemitter of said fifth transistor said first resistor, said output leadof said amplifier F sald f potenual' base being connected to saiddisabling circuit, current of 531d fl translstor P coupled come throughSaid'second diode causing Said amplifier tors of said first and saidsecond transistors; and to provide a feedback signal to said disablingciran FP havmg Input l an output lead cuit when said capacitor isdischarging, said feedi Input lead bemg, connected to back signalcausing said disabling circuit to have a Sald :athode of Said, secondmode f output a low value of impedance irrespective of any other of saidamplifier being coupled to said base of said signals which are coupledto said disabling circuit. fifth transistor I 7. A pulse generator foruse with a switching regula- Pulse generator 38 efined lll Claim 7including: tor having first and second transformers each having a thirdfourth and fifth q thud dlod? belng primary winding and a secondarywinding, said genera connfacted between cfmecmr of ,Sald tor comprising,transistor and said base of said fifth trans stor, said a unijunctiontransistor having an emitter and first fourth dlode bemg connfected Saldand Second bases; tor of said second transistor and said base of said acapacitor, a first plate of said capacitor being confifth transltor saldfifth i connectefd nected to Said emitter of Said unijunction 40 betweensaid output lead of said amplifier and said transistor; base of saidfifth transistor.

9. A pulse generator as defined in claim 8 wherein said amplifierincludes:

a sixth transistor having a base, a collector and an emitter, saidemitter of said sixth transistor being connected to said secondpotential,said base of said sixth transistor being connected to saidinput first, second, third, fourth and fifth resistors;

first and second reference potentials, said second base of saidunijunction transistor being connected to said first potential;

a signal-input terminal;

first and second diodes, said first diode being connected between saidinput terminal and said first lead P fmphfier, conefitor of sad slxthplate of said capacitor, said first resistor being cona bemg connectedto Sam output lead nected between a second plate of said capacitoramphfieriand and the cathode of Said Second diode the anode of sixth andseventh resistors, said sixth resistor being said second diode beingconnected to said second comecteq beiween i first Potential and Saidbase of said sixth transistor, said seventh resistor first, second,third, fourth and fifth transistors each connected f f saldfn'stPotential am having a base, a collector and an emitter, said Sandcollector ofsald Slxth translstorsecond resistor being connected betweensaid first

1. A pulse generator for use with a switching regulator having a pair ofsilicon controlled rectifiers, a pair of diodes, and first and secondtransformers each having a primary winding and a secondary winding, saidgenerator comprising: a unijunction transistor having an emitter andfirst and second bases; a capacitor, a first plate of said capacitorbeing connected to said emitter of said unijunction transistor; a firstresistor; first and second reference potentials, said second base ofsaid unijunction transistor being connected to said first potential; asignal-input terminal; a first diode, said first diode being connectedbetween said input terminal and said first plate of said capacitor; adisabling circuit, said disabling circuit being connected between saidsecond potential and said first base of said unijunction transistor,said first resistor being connected between a second plate of saidcapacitor and said second potential, said disabling circuit beingcoupled to said regulator, said regulator developing a first signal whenboth of said diodes in said regulator are conducting, said first signalcausing said disabling circuit to have an extremely large value ofimpedance between said second potential and said unijunction transistor,said regulator developing a second signal when either of said diodes insaid regulator is not conducting, said second signal causing saiddisabling circuit to have a low value of Impedance between said secondpotential and said unijunction transistor; a recovery disable circuit,said disable circuit being connected between said input terminal andsaid second potential, said disable circuit being coupled to saidregulator, said regulator providing a signal which causes said disablecircuit to have a low impedance between said input terminal and saidsecond potential when either of said rectifiers is conducting, saiddisable circuit having a large value of impedance when neither of saidrectifiers is conducting.
 2. A pulse generator as defined in claim 1wherein: said disabling circuit is coupled to said recovery disablecircuit, said first signal from said regulator causing said recoverydisable circuit to develop a disabling signal which causes saiddisabling circuit to have an extremely large value of impedance betweensaid second potential and said unijunction transistor, said secondsignal from said regulator causing said recovery disable circuit todevelop an enabling signal which causes said disabling circuit to have alow value of impedance.
 3. A pulse generator as defined in claim 1wherein said recovery disable circuit includes: first, second, third andfourth transistors each having a base, a collector and an emitter;second, third, fourth and fifth resistors, said second resistor beingconnected between said first potential and said collector of said firsttransistor, said third resistor being connected between said firstpotential and said collector of said second transistor, said emitters ofsaid first and said second transistors being connected to said secondpotential, said bases of said third and said fourth transistors beingconnected to said second potential, said emitter of said thirdtransistor being connected to said base of said first transistor, saidemitter of said fourth transistor being connected to said base of saidsecond transistor, said collectors of said third and said fourthtransistors being connected to said input terminal, said fourth resistorbeing connected between said base of said first transistor and a firstend of said secondary winding of said first transformer, said fifthresistor being connected between said base of said second transistor anda first end of said secondary winding of said second transformer, asecond end of each of said secondary windings of said first and saidsecond transformers being connected to said second potential.
 4. A pulsegenerator as defined in claim 3 wherein said disabling circuit includes:a fifth transistor having a base, a collector and an emitter, saidemitter of said fifth transistor being connected to said secondpotential, said collector of said fifth transistor being connected tosaid first base of said unijunction transistor, said base of said fifthtransistor being coupled to said collectors of said first and saidsecond transistors.
 5. A pulse generator as defined in claim 1including: a second diode, said second diode being connected betweensaid first resistor and said second potential; and an amplifier havingan input lead and an output lead, said input lead of said amplifierbeing connected to the junction point between said second diode and saidfirst resistor, said output lead of said amplifier being connected tosaid disabling circuit, current through said second diode causing saidamplifier to provide a feedback signal to said disabling circuit whensaid capacitor is discharging, said feedback signal causing saiddisabling circuit to have a low value of impedance irrespective of anyother signals which are coupled to said disabling circuit.
 6. A pulsegenerator as defined in claim 3 including: a second diode, said seconddiode being connected between said first resistor and said secondpotential; and an amplifier having an input lead and an output lead,said input lead of said amplifier being connected to the junction pointbetween said second diode and said first resistor, said output lead ofsaid amPlifier being connected to said disabling circuit, currentthrough said second diode causing said amplifier to provide a feedbacksignal to said disabling circuit when said capacitor is discharging,said feedback signal causing said disabling circuit to have a low valueof impedance irrespective of any other signals which are coupled to saiddisabling circuit.
 7. A pulse generator for use with a switchingregulator having first and second transformers each having a primarywinding and a secondary winding, said generator comprising: aunijunction transistor having an emitter and first and second bases; acapacitor, a first plate of said capacitor being connected to saidemitter of said unijunction transistor; first, second, third, fourth andfifth resistors; first and second reference potentials, said second baseof said unijunction transistor being connected to said first potential;a signal-input terminal; first and second diodes, said first diode beingconnected between said input terminal and said first plate of saidcapacitor, said first resistor being connected between a second plate ofsaid capacitor and the cathode of said second diode, the anode of saidsecond diode being connected to said second potential; first, second,third, fourth and fifth transistors each having a base, a collector andan emitter, said second resistor being connected between said firstpotential and said collector of said first transistor, said secondresistor being connected between said first potential and said collectorof said second transistor, said emitters of said first and said secondtransistor being connected to said second potential, said bases of saidthird and said fourth transistors being connected to said secondpotential, said emitter of said third transistor being connected to saidbase of said first transistor, said emitter of said fourth transistorbeing connected to said base of said second transistor, said fourthresistor being connected between said base of said first transistor anda first end of said secondary winding of said first transformer, saidfifth resistor being connected between said base of said secondtransistor and a first end of said secondary winding of said secondtransformer, a second end of each of said secondary windings of saidfirst and said second transformers being connected to said secondpotential, said collectors of said third and said fourth transistorsbeing connected to said input terminal, said collector of said fifthtransistor being connected to said first base of said unijunctiontransistor, said emitter of said fifth transistor being connected tosaid second potential, said base of said fifth transistor being coupledto said collectors of said first and said second transistors; and anamplifier having an input lead and an output lead, said input lead ofsaid amplifier being connected to said cathode of said second diode,said output lead of said amplifier being coupled to said base of saidfifth transistor.
 8. A pulse generator as defined in claim 7 including:third, fourth and fifth diodes, said third diode being connected betweensaid collector of said first transistor and said base of said fifthtransistor, said fourth diode being connected between said collector ofsaid second transistor and said base of said fifth transistor, saidfifth diode being connected between said output lead of said amplifierand said base of said fifth transistor.
 9. A pulse generator as definedin claim 8 wherein said amplifier includes: a sixth transistor having abase, a collector and an emitter, said emitter of said sixth transistorbeing connected to said second potential, said base of said sixthtransistor being connected to said input lead of said amplifier, saidcollector of said sixth transistor being connected to said output leadof said amplifier; and sixth and seventh resistors, said sixth resistorbeing connected between said first potential and said base of said sixthtransistor, Said seventh resistor being connected between said firstpotential and said collector of said sixth transistor.